| 摘要 |
PURPOSE: A skip macro block processor is provided to compensate a skip macro block and to realize the continuous motions of a VLC(Variable Length Coding) decoder. CONSTITUTION: In an HDTV(High Definition Television) decoder, a VLD(Variable Length Decoding) unit comprises a VLC decoder(8) transmitting a bit stream by decoding, an mba(macro block address) decoder(9) predicting an mba, a parameter decoder(10) decoding a parameter, a coefficient decoder(11) decoding the run-level pair of a coefficient from the VLC decoder, a motion vector decoder(12) decoding a motion vector, a first, second, third, and fourth FIFO(First-In First-Out) corresponding to the decoders of mba, parameter, coefficient, and motion vector, an mba generator(13) generating an mba and deciding a skip macro block, a parameter generator(14) generating a parameter, a coefficient generator(15) generating a coefficient by reading the run-level pairs from the FIFO, and a motion vector generator(16) generating a motion vector.
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