发明名称 Semiconductor apparatus having wiring structure of an integrated circuit in which a plurality of logic circuits of the same structure are arranged in the same direction
摘要 <p>In a semiconductor apparatus, a first circuit (3) provided on a major surface of a semiconductor substrate. The first circuit includes a plurality of logic circuits (51...5n) of an identical structure, the logic circuits having input terminals supplied with identical signals. First metal wiring (30) is provided on the semiconductor substrate in a direction identical to a direction of arrangement of the logic circuits, the first metal wiring being connected to one of the input terminals of each of the logic circuits. A second circuit (6) provided on the major surface of the semiconductor substrate in an outside area which does not overlap an area extending in a direction perpendicular to the direction of arrangement of the logic circuits, the second circuit supplying an identical signal to the input terminals of the logic circuits of the first circuit. A second metal wiring (40) is connected between an output terminal of the second circuit and a substantially middle point of the first metal wiring. The second metal wiring has a portion situated in parallel to the logic circuits. Thereby, an influence of wiring delay due to a difference in distances among the logic circuits can be reduced and a high-speed operation is achieved. <IMAGE></p>
申请公布号 EP0642161(B1) 申请公布日期 2001.10.24
申请号 EP19940113133 申请日期 1994.08.23
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MASUDA, MASAMI
分类号 H01L21/82;G11C11/401;G11C11/408;H01L21/3205;H01L23/52;H01L23/522;(IPC1-7):H01L23/522 主分类号 H01L21/82
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