| 摘要 |
PURPOSE: A memory circuit is provided to obtain sufficiently an operating margin and a high speed though a supply voltage is in a state of a low level. CONSTITUTION: A first MOS transistor(11) of a first conductive type is connected to a first input/output terminal(S) and a second input/output terminal(D). A second MOS transistor(12) of a second conductive type and a third MOS transistor(13) of a second conductive type are connected between the first reference potential terminal and the second reference potential terminal. The first MOS transistor includes a source connected to the first input/output terminal, a gate connected to a node(X), and a drain connected to the second input/output terminal. The second MOS transistor includes a drain connected to the first reference potential terminal, a gate connected to a control terminal(G), and a source connected to the node(X). The third MOS transistor includes a drain connected to the node(X), a gate connected to the second input/output terminal, and a source connected to the reference potential terminal.
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