| 摘要 |
A column register of an integrated circuit memory, notably in EEPROM technology, is utilized in a method of writing a data word of 2p bits in the memory, where p is a non-zero whole number. The method includes the following steps:1) erasing all the cells of the word;2) loading 2q data in 2q high-voltage latches (HV1, HV3, HV5, HV7), and loading 2p-2q other data in the 2p-2q low-voltage latches (LV0, LV2, LV4, LV6); and3) programming 2q cells of the memory (M0, M2, M4, M6) as a function of the data memorized in the 2q high-voltage latches;as well as repeating 2p-q-1 times the following steps:4) loading, in the 2q high-voltage latches, of 2q other data that were loaded in the 2q low-voltage latches at step 2); and5) programming 2q other cells of the memory (M1, M3, M5, M7) as a function of the data memorized in the 2q high-voltage latches.
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