发明名称 Advanced isolation process for large memory arrays
摘要 A process for creating silicon isolation regions which utilizes silicon islands or pillars as sources of silicon for silicon dioxide (or silicon oxide) fields. These silicon oxide fields separate active areas within a device. By providing multiple sources of silicon for silicon oxide formation, the described invention minimizes the use of trench wall edges as silicon sources for silicon oxide growth. This reduction in stress helps to minimize encroachment and undergrowth or bird's beak formation. This process also leads to a reduced step height between the field oxide and active areas, thus providing a more planar wafer surface.
申请公布号 US6306727(B1) 申请公布日期 2001.10.23
申请号 US19970912505 申请日期 1997.08.18
申请人 MICRON TECHNOLOGY, INC. 发明人 AKRAM SALMAN
分类号 H01L21/762;(IPC1-7):H01L21/76 主分类号 H01L21/762
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