VOLTAGE DELAY CIRCUIT OF FLAT PANEL DISPLAY

摘要

PURPOSE: A voltage delay circuit of a flat panel display is provided to improve the latch up characteristics of a gate driver by controlling a delay time when turn-on voltage passes by the voltage delay circuit. CONSTITUTION: A flat panel display is composed of a voltage converting circuit(10), a voltage delay circuit(20), a gate driver(30), and a flat panel display panel(40). When a power voltage(Vdd) is applied, the voltage converting circuit(10) converts a gate of pixels within the flat panel display panel into a turn-on voltage(Von) and a turn-off voltage(Voff). The transformed turn-on voltage(Von) passes by the voltage delay circuit(20) and is delayed during predetermined time. The delayed turn-on voltage(Von1) during predetermined time is applied to the gate driver(30) and the gate driver(30) drives the pixel gate of the flat panel display panel(40). The voltage delay circuit(20) is composed of a voltage integration circuit, a reference voltage generating circuit, and a comparing circuit.