| 摘要 |
The present invention efficiently and accurately predicts indirect branch target addresses in computer code, thereby significantly increasing processing speed. According to the present invention, an optimizing compiler inserts indirect branch target address hints in advance of their corresponding indirect branches, thereby allowing the processor time to execute and utilize the hints. The present invention avoids the processor pipeline flushes associated with previous hardware solutions by allowing more accurate prediction of indirect branch target addresses. In addition, the present invention is not dependent upon having a large cache memory associated with the microprocessor or repeatedly encountering the same indirect branch within a certain preset period of time. Moreover, the present invention avoids the performance and compile time problems of the software solutions of the prior art by maintaining the indirect branch constructs.
|
