发明名称 PLL SEMICONDUCTOR DEVICE, AND TESTING METHOD AND DEVICE THEREFOR
摘要 PURPOSE: To shorten the required time for test, and to reduce the testing cost by further easily testing a PLL semiconductor device including a voltage control oscillator and a frequency divider. CONSTITUTION: Not only the voltage control oscillator 10A but also an R frequency divider 21, a (PN+A) frequency divider 22 capable of varying a value of A, a phase comparator 23 and a charge pump 24 are formed in the PLL semiconductor device 20. A low-pass filter 25 confirmed in having a standard characteristic is externally attached to this PLL semiconductor device to constitute a PLL circuit of a testing object. The (PN+A) frequency divider 22 is a pulse swallow system, and the input end for setting the value of A to a value before and after user ordinary use time is connected to an external terminal of the PLL semiconductor device 20 for simplifying a test. A dividing value of the frequency divider 22 is set to the value before and after the use time to check whether or not the PLL circuit synchronously oscillates in a prescribed time to judge the quality of the PLL semiconductor device 20.
申请公布号 KR20010091008(A) 申请公布日期 2001.10.22
申请号 KR20010007415 申请日期 2001.02.15
申请人 FUJITSU LIMITED 发明人 NIRAZUKA KIMITOSHI
分类号 G01R31/316;G01R25/00;G01R31/30;H03L7/00;H03L7/08;(IPC1-7):H03L7/00 主分类号 G01R31/316
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