| 摘要 |
PROBLEM TO BE SOLVED: To provide an analog/digital conversion circuit of a successive approximation type that attains high-speed conversion while suppressing deterioration in the analog/digital conversion accuracy due to the effect of a decreased speed of a comparator. SOLUTION: The comparator compares an analog input voltage with an analog output voltage outputted from the digital/analog conversion circuit from the most significant bit toward the least significant bit and sets the comparison result to a corresponding bit of a successive approximation register in the analog/digital conversion circuit, which is provided with a control circuit that controls an analog/digital conversion period for at least the least significant bit to be longer than the conversion period of the other bits so as to increase the speed of the clock used for the conversion for the other bits.
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