| 摘要 |
PROBLEM TO BE SOLVED: To provide an automatic layout method and apparatus for realizing layout change for ensuring the hold time of a flip flop without changing logic circuit information designated at first in an integrated circuit layouted by an automatic layout apparatus. SOLUTION: A table indicating a relation between the length of wiring and a delay value due to an inter-wiring parasitic capacity is preliminarily prepared inside an automatic layout device, inter-F/F wiring in which hold/margin insufficiency is generated is extracted in the wiring of the layout integrated circuit, the wiring length fulfilling the hold margin is calculated from the table, and additional wiring 37 is wired in parallel to data propagating wiring 35 with an interval fulfilling a design rule so that the hold margin can be fulfilled.
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