发明名称 Read/write amplifier having vertical transistors for a DRAM memory
摘要 As a consequence of DRAM memory cell miniaturization, the available space for read/write amplifiers decreases in width from hitherto 4 bit line grids to 2 bit lines grids. Conventionally previously known read/write amplifiers cannot be accommodated on this reduced, still available space. Therefore, it has not been possible hitherto to provide read/write amplifiers arranged beside one another which would manage with the novel DRAM memory cell spacings. The principle underlying the invention is based on replacing at least some of the transistors of conventional design which are usually used for read/write circuits by "vertical transistors" in which the differently doped regions are arranged one above the other or practically one above the other. Compared with the use of conventional transistors, the use of vertical transistors saves enough space to ensure an arrangement of a read/write circuit in the grid even with a reduced grid width.
申请公布号 US2001030884(A1) 申请公布日期 2001.10.18
申请号 US20010796207 申请日期 2001.06.01
申请人 FREY ALEXANDER;WEBER WERNER;SCHLOSSER TILL 发明人 FREY ALEXANDER;WEBER WERNER;SCHLOSSER TILL
分类号 G11C11/4091;H01L21/8242;H01L27/04;H01L27/108;H01L29/78;(IPC1-7):G11C11/24;G06F12/00 主分类号 G11C11/4091
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