发明名称 |
Integrated memory with plate line segments |
摘要 |
The integrated memory has driver units DRVi, via which the column select lines CSLi are connected to the plate line segments PLi and which, as a function of the potential of the associated column select lines CSLi and the word addresses RADR on the plate line segments PLi connected to them, generate potentials which have defined values for each operating state of the memory.
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申请公布号 |
US2001030894(A1) |
申请公布日期 |
2001.10.18 |
申请号 |
US20010792796 |
申请日期 |
2001.02.23 |
申请人 |
BRAUN GEORG;HONIGSCHMID HEINZ |
发明人 |
BRAUN GEORG;HONIGSCHMID HEINZ |
分类号 |
G11C11/22;H01L21/8246;H01L27/10;H01L27/105;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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