发明名称 Method for fabricating raised source/drain structures
摘要 The present invention provides a method for fabricating elevated and drain structures on a substrate. A first insulating layer is formed over a silicon substrate. A first barrier layer is formed over the first insulating layer. The first barrier layer, the first insulating layer and the substrate are patterned to form a trench. Ions are implanted into the substrate in the trench. A gate oxide layer is formed on the substrate in the trench. A polysilicon layer is deposited over the gate oxide layer and the barrier layer. The polysilicon layer is planarized using a chemical mechanical polishing process (CMP) stopping on the barrier layer to form a novel recessed gate. The barrier layer and the first insulating layer are removed. Lightly doped source/drain regions (LDD) are formed adjacent to the recessed gate. Spacers are formed on the sidewalls of the recessed gate. Source and drain regions are formed adjacent to the spacers. Salicide layers are formed on the source and drain regions and on the top of the recessed gate.
申请公布号 US6303448(B1) 申请公布日期 2001.10.16
申请号 US19980187303 申请日期 1998.11.05
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 CHANG SHOU-ZEN;TSAI CHAO-CHIEH
分类号 H01L21/336;H01L29/78;(IPC1-7):H01L21/336 主分类号 H01L21/336
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