发明名称 Semiconductor device having reduced source leakage during source erase
摘要 In one aspect, the current invention provides a method for reducing the source leakage of a semiconductor device. The method comprises the steps of stacked gate etch, thin oxide formation, SAS etch, spacer formation and source implant on the semiconductor substrate.In a second aspect, the current invention provides another method for reducing the source leakage of a semiconductor device. The method comprises the steps of stacked gate etch, first oxide layer formation, first source implant, annealing, SAS etch, second oxide layer formation, spacer formation, and second source implant.In yet another aspect, the current invention provides a novel semiconductor device. The semiconductor device is comprised of a stacked gate provided on a portion of a semiconductor substrate, a first oxide layer appended to the stacked gate, a second oxide layer formed on the first oxide layer and a spacer formed on the second oxide layer. The semiconductor device also has a doped source region having a first doped region disposed under the edge of the stacked gate and a second doped region disposed at the edge of the doped source region under the stacked gate. The second doped region has a higher concentration of dopant than the first doped region, which reduces source leakage of the semiconductor device.
申请公布号 US6303959(B1) 申请公布日期 2001.10.16
申请号 US19990375751 申请日期 1999.08.25
申请人 ALLIANCE SEMICONDUCTOR CORPORATION 发明人 RATNAM PERUMAL
分类号 H01L21/28;H01L21/336;H01L21/8247;H01L27/115;H01L29/423;H01L29/788;(IPC1-7):H01L29/76 主分类号 H01L21/28
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