发明名称 Low voltage flash memory cell
摘要 A process for manufacturing flash memories is disclosed. In one embodiment, a first oxide layer is deposited over a substrate and then, a first polysilicon layer is deposited over the oxide layer. When the first polysilicon layer is etched and formed, an ONO (oxide nitride oxide) layer is deposited over the first polysilicon layer. Then, portions of the ONO layer and the first polysilicon layer are removed to form two nitride fences. A tunnel oxide layer in a conformal shape is subsequently deposited over said nitride fences, some portions of the first oxide layer, and said substrate. After depositing of tunnel oxide layer, a floating gate polysilicon layer, a second oxide layer, and a second polysilicon layer are deposited. Portions of the second polysilicon layer, the second oxide layer, the floating gate layer, and the tunnel oxide layer are, subsequently, removed. Finally, a drain well and a source well are formed in the substrate.
申请公布号 US6303960(B1) 申请公布日期 2001.10.16
申请号 US19990437503 申请日期 1999.11.10
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CORPORATION 发明人 WANG LING-SUNG
分类号 H01L21/28;H01L21/8247;H01L27/115;H01L29/423;(IPC1-7):H01L29/72 主分类号 H01L21/28
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