发明名称 |
Flash with consistent latency for read operations |
摘要 |
A synchronous flash memory includes an array of non-volatile memory cells. The memory device has a package configuration that is compatible with an SDRAM. The memory device includes a pipelined buffer with selectable propagation paths to route data from the input connection to the output connection. Each propagation path requires predetermined number of clock cycles. The non-volatile synchronous memory includes circuitry to route both memory data and register data through the pipelined output buffer to maintain consistent latency for both types of data. |
申请公布号 |
AU8929101(A) |
申请公布日期 |
2001.10.15 |
申请号 |
AU20010089291 |
申请日期 |
2001.03.30 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
FRANKIE F. ROOHPARVAR |
分类号 |
G11C16/02;G06F12/00;G06F13/16;G06F13/42;G11C7/10;G11C8/18;G11C16/06;G11C16/10;G11C16/26 |
主分类号 |
G11C16/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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