| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory which has high reliability of operation even in a high operation frequency and in which circuit scale and current consumption are reduced. SOLUTION: This memory is a semiconductor memory outputting data synchronizing with an external clock signal, and is provided with a first frequency divider 61 generating a first internal clock signal by frequency-dividing a supplied external clock signal, a DLL circuit 59 delaying variably an external clock signal, a second frequency-divider 65 generating a second internal clock signal by frequency-dividing a signal outputted from the DLL circuit 59, and a data control section 29 outputting data in accordance with the first internal clock signal and the second internal clock signal.
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