发明名称 |
WAIT CONTROL CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a wait control circuit improved in use convenience while accelerating a system clock. SOLUTION: It is detected that a wait signal is changed from one level to the other level and corresponding to such a detecting signal, a wait state is inserted to an access state corresponding to the system clock of a microprocessor.
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申请公布号 |
JP2001282717(A) |
申请公布日期 |
2001.10.12 |
申请号 |
JP20000100267 |
申请日期 |
2000.04.03 |
申请人 |
HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD |
发明人 |
INOUE YOSHIHITO;ITO HIROHIKO;FUJII CHIKO |
分类号 |
G06F13/42;(IPC1-7):G06F13/42 |
主分类号 |
G06F13/42 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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