发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To set the noise margin of logic circuits to a more high value, ensure the speed in operation and reduce the power consumption in standby. SOLUTION: The circuit threshold in a logic circuit 104 becomes approximately V, the potential of a potential feed circuit 106, by the feedback control through a differential amplifier 107. The potential V is set to e.g. a median between potentials V2, V3, i.e., 1/2(V2+V3), thereby maximizing the noise margin of the circuit. The potential of a second polarity type well 110 may be variably set to a desired potential by feeding VX through an amplifier 109. In standby, the potential VX of the well 110 is set lower than V3 to shift the threshold voltage of an n-channel MOSFET in the logic circuit 104 to the plus side, thereby suppressing the working current. In operation, VX is set higher than V3 to shift the threshold voltage to the minus side to increase the speed.
申请公布号 JP2001284535(A) 申请公布日期 2001.10.12
申请号 JP20000093934 申请日期 2000.03.30
申请人 TOSHIBA CORP 发明人 KAMEYAMA ATSUSHI;FUSE TSUNEAKI;YOSHIDA MASAKO
分类号 H01L21/822;H01L21/82;H01L27/04;H01L27/092;H03K19/00;H03K19/003;H03K19/094;(IPC1-7):H01L27/04 主分类号 H01L21/822
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