发明名称 CONGESTION EVADING METHOD FOR MEMORY DUPLEX DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a congestion evading method for memory duplex device by which a processing is switched to the other processing for reducing the load of a processor at the time of congestion in a device having duplicated constitutional elements and an excess memory for storing a difference LM is eliminated without inducing the malfunction of a processing program due to a patch miss differently from conventional methods for applying a patch or evading congestion by the difference LM. SOLUTION: A processing program is loaded on a duplex memory (main storage device). A main system loads a normal processing program and a sub-system loads a processing program obtained by omitting a part other than essential processing from the normal processing program. The load of the processing program driven in the main storage device is compared with a previously determined threshold, and at the time of congestion, the processing program is switched to the other processing program omitting the part other than the essential processing from the normal processing program. At the time of shifting the processing program to the other system, the current information on the main system is also shifted.
申请公布号 JP2001282522(A) 申请公布日期 2001.10.12
申请号 JP20000097396 申请日期 2000.03.31
申请人 HITACHI SOFTWARE ENG CO LTD 发明人 ISHIZUKA MAKOTO;TAKAHASHI HIROAKI
分类号 G06F15/177;G06F9/06;(IPC1-7):G06F9/06 主分类号 G06F15/177
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