发明名称 CIRCUIT INTEGRE DE FAIBLE ENCOMBREMENT
摘要 The integrated circuit comprises electronic components (32) integrated on a silicon chip (31) and connectors for welding metal wires (14). The connectors comprise metallized depressions (34) of depth 40-120 microns made on the silicon chip surface and providing welding areas for metal wires located below the silicon wafer surface plane. The depressions (34) are made by isotropic chemical etching and comprise four sides forming an angle of 58 deg relative to the chip surface. The depressions (34) either have a flat bottom or their walls meet at the bottom of the depressions (34). The bottom and the walls of the depressions (34)are covered with a metal layer (35) extending to the surface of the chip in the form of conductive tracks. Independent claims are given for: (a) an electronic micro-module comprising an integrated circuit as above and being fixed to a support and connected to the support by wiring ultrasonically welded to the bottom of the depressions; (b) a portable electronic item comprising the micro-module; and (c) production of an integrated circuit on a monocrystalline silicon chip.
申请公布号 FR2790141(B1) 申请公布日期 2001.10.12
申请号 FR19990002478 申请日期 1999.02.22
申请人 STMICROELECTRONICS SA 发明人 CORRIOL CHRISTIAN
分类号 H01L23/485;H01L23/498;H01L29/06 主分类号 H01L23/485
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