摘要 |
<p>The system and method facilitates the transmission of relatively high voltage signals via a thin oxide gate CMOS device without an excessivelydetrimental electric field build up across the thin oxide layers forming a gatein a CMOS device. The high voltage CMOS thin oxide gate system andmethod provides a degradation repression bias voltage signal to the thin oxide gate of the CMOS device. The degradation repression bias voltage signal establishes a differential voltage potential between the source and draincomponents of the thin oxide gate output CMOS device and the gate component of the thin oxide gate output CMOS device. The degradation repression bias voltage signal is maintained at a level that prevents that excessively detrimental electric field stresses are not induced in oxide layersthat form the thin oxide gate in the output CMOS device. The System and method does not require additional power supplies or reference voltages and does not cause the thin gate oxide device to dissipate additional power in a static (non-switching) state.</p> |