发明名称 PLATING METHOD AND DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To drastically decrease the thickness of a gold plating layer formed needlessly the back surface of a tape when manufacturing a semiconductor device such as BGA or CSP. SOLUTION: A plating electrode 13 is installed at a position opposite to the front surface of a tape 12 in the internal treating tank 3 of a plating device, and a plating inhibiting electrode 14 is installed at a position opposite to the back surface of the tape 12. A positive voltage is applied on the plating electrode 13 and a negative voltage on the plating inhibiting electrode 14, to conduct electroplating of gold. Consequently, a gold plating layer is formed on the front surface of the tape 12 in an expected thickness. On the other hand, the thickness of the needless gold plating layer formed on the rear surface of the tape 12 is drastically decreased.</p>
申请公布号 JP2001279487(A) 申请公布日期 2001.10.10
申请号 JP20000090986 申请日期 2000.03.29
申请人 CASIO MICRONICS CO LTD;CASIO COMPUT CO LTD 发明人 YAMAMOTO MICHIHIKO
分类号 C25D5/02;C25D5/18;C25D7/06;C25D21/00;H01L21/60;H01L23/12;(IPC1-7):C25D5/02 主分类号 C25D5/02
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