A DRAM cell utilizes to form its storage capacitor a trench whose lower portion formed in a n-type substrate is etched electrochemically to provide the walls of such portion with large pores (31A). The porous walls are coated with a dielectric (26B) and the trench then filled with doped polysilicon (24A). There results a capacitor with a very large surface area and a high capacitance. <IMAGE>