Depleted sidewall-poly LDD transistor

摘要

The present invention is directed to a metal oxide semiconductor transistor having a fully overlapped lightly doped drain (LDD) structure which offers the advantages of conventional fully overlapped LDD transistors but which significantly reduces the drain-to-gate overlap capacitance associate therewith. To achieve fully overlapped LDD construction and reduced drain-to-gate overlap capacitance, the metal oxide semiconductor transistor of the present invention employs a gate electrode comprising a main gate region formed from heavily doped polysilicon and depleted sidewall polysilicon spacers formed from undoped or depleted polysilicon. In the MOS transistor of the present invention, the lightly doped regions are fully over-lapped by the combination of the depleted sidewall polysilicon spacers and the main gate region.