| 摘要 |
Programmable input/output cell circuitry for use in an integrated circuit and having various programmably selectable modes of operation which may include (1) a first output mode in which one output signal is applied to a pin during each cycle of a clock signal, (2) a second output mode in which two different output signals are time-division multiplexed to the pin during respective halves of the clock signal cycle, (3) a first input mode in which one input signal value is received from the pin during each cycle of the clock signal, and (4) a second input mode in which two time-division multiplexed input signals are received from the pin during respective halves of the clock signal cycle and demultiplexed by the input/output cell circuitry.
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