发明名称 DIGITAL SIGNAL GENERATING LOCK
摘要 PROBLEM TO BE SOLVED: To prevent intentional generation of abnormality of an apparatus by short-circuiting a circuit or the like, by inhibiting a lock from directly supplying driving power source to the apparatus. SOLUTION: A digital signal generator 3 is provided for the lock 1.
申请公布号 JP2001271525(A) 申请公布日期 2001.10.05
申请号 JP20000128609 申请日期 2000.03.24
申请人 MIKI HIRONOBU 发明人 MIKI HIRONOBU
分类号 E05B49/00;E05B17/22;(IPC1-7):E05B49/00 主分类号 E05B49/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利