发明名称 METHOD OF FORMING ELEMENT ISOLATING TRENCH STRUCTURE
摘要 PROBLEM TO BE SOLVED: To provide a method of manufacturing a element isolating trench structure, with which the recesses of an insulating film at corners of a trench formed on a semiconductor can be reduced and the element region size can be miniaturized to the limit of a photolithographic system. SOLUTION: A mask pattern 2, 3, 4 having an opening 5 in a semiconductor substrate is formed and used to form a trench 6 on the semiconductor. The opening 5 and the trench 6 are filled with a silicon oxide film 8. After the mask pattern is removed, a silicon oxide film 9 is further formed and etched back. A sidewall of the silicon oxide film 9 is provided on the sidewall of the silicon oxide film 8. After ion implantation to form a transistor in an element region 11, the silicon oxide film 10 on the element region is removed.
申请公布号 JP2001274235(A) 申请公布日期 2001.10.05
申请号 JP20000089501 申请日期 2000.03.28
申请人 NEC CORP 发明人 KUMAMOTO KEITA
分类号 H01L21/76;H01L21/762;H01L21/763;(IPC1-7):H01L21/76 主分类号 H01L21/76
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