| 摘要 |
PROBLEM TO BE SOLVED: To suppress reduction of access speed for a memory cell at the time of normal access mode when a forced access mode for a redundant cell test is added to a data line shift circuit, in a semiconductor memory having a data line shift redundant circuit system. SOLUTION: This device is provided with a data line shift circuit 8 connecting plural data lines and spare data lines to plural input/output data lines, plural input/output number giving circuits 181, 182 allotting a shift indicating number increasing one by one for each start point of data line shift by the data line shift circuit to each input/output data line as position information, a selecting circuit 10 storing corresponding relation of a defective column address and a shift indicating number, and outputting a selecting signal corresponding to a shift indicating number when a defective column address is inputted, a shift control circuit 9 comparing a selecting signal with the shift indicating number and outputting a shift control signal to the data line shift circuit depending on the compared result, and a number setting selecting circuit 183 using selectively plural input/output number giving circuits.
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