发明名称 INTEGRATED SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To provide an integrated semiconductor memory constituted so that a redundant memory cell unit can be tested and the circuit configuration therefor is scarcely complexed inevitably. SOLUTION: This memory is provided with a memory cell MC arranged as a normal unit WL being addressable, a memory cell MC arranged as at least one unit RWL1 to replace the normal unit, an address bus 3 to which an address ADR can be applied, a redundant circuit 1 for selecting a redundant unit RWL1 connected to this address bus 3, and a processing unit 2. The processing unit 2 is connected to a terminal A of the address bus 3 at an input side, and connected to an input side of the redundant circuit 1 at an output side. The redundant unit RWL1 can be tested before programming of restoration information in the redundant circuit 1, moreover, the circuit is not made complex so much.
申请公布号 JP2001273791(A) 申请公布日期 2001.10.05
申请号 JP20010029947 申请日期 2001.02.06
申请人 INFINEON TECHNOLOGIES AG 发明人 BOEHM THOMAS;HOENIGSCHMID HEINZ;LAMMERS STEFAN;MANYOKI ZOLTAN
分类号 G01R31/28;G01R31/3185;G11C29/00;G11C29/04;G11C29/24;(IPC1-7):G11C29/00;G01R31/318 主分类号 G01R31/28
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