发明名称 METHOD AND DEVICE FOR DESIGNING INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To prevent another problem in the design result of a overall circuit even if higher/lower hierarchy design results are combined and to eliminate the need for redesigning a higher hierarchy and a lower hierarchy. SOLUTION: A hierarchy separation element for separating a timing restriction and a physical restriction on design is installed at the boundary of a higher hierarchy, and a lower hierarchy and upper/lower hierarchy designs are made independent in the hierarchy design of an integrated circuit. Thus, another problem is prevented in the design result of the overall circuit, even if the upper/lower hierarchy design results are combined, since the design results of the upper/lower hierarchies are prevented from affecting each other in a circuit where the upper/lower hierarchy designs are combined, and the need for redesigning the higher/lower hierarchies is eliminated.
申请公布号 JP2001274252(A) 申请公布日期 2001.10.05
申请号 JP20000085316 申请日期 2000.03.24
申请人 TOSHIBA CORP 发明人 KIMURA KAZUNARI
分类号 H01L21/82;G06F17/50;(IPC1-7):H01L21/82 主分类号 H01L21/82
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