发明名称 MOS REGULATOR CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a MOS regulator circuit with a high ratio of a ripple elimination. SOLUTION: The transistor 7 wired with the current mirror 5 is connected with what consists of a differential configuration of the MOS transistor 1, 2, the P channel MOS transistor pair comprising the current mirrors 4, 5, 6, the N channel MOS transistor pair, the output MOS transistor 9 and a resistor to decide an output voltage, the transistor 8 is connected with wired current mirror 5 and current mirror 6 and connected with a gate of the output transistor 9. Transistor 9 becomes the MOS regulator circuit with the high ratio of the ripple elimination with a reduced impedance, and expanded and improved frequency characteristic of transistor 9 because transistor 9 is connected with the transistor 7 and 8 through an emitter follower. Furthermore, a dynamic range of output transistor 9 can be expanded by connecting the transistor 16 with output transistor 9 and current mirror 6.
申请公布号 JP2001273042(A) 申请公布日期 2001.10.05
申请号 JP20000085488 申请日期 2000.03.27
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KURASHINA KENICHI;FUKAZAWA TOSHINORI
分类号 G05F1/56;H03F1/34;H03F3/345;(IPC1-7):G05F1/56 主分类号 G05F1/56
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