发明名称 |
EVALUATING METHOD FOR DEFECTIVE WIRING |
摘要 |
PROBLEM TO BE SOLVED: To speedily and accurately perform evaluation of reliability of metal wiring of a semiconductor device with respect to electromigration. SOLUTION: With respect to the defective wiring evaluating method by which metal wires formed on a substrate are heated to a constant temperature, a current flows through them, the time change rate of of the resistance of the metal wires is checked and defects of he wires are evaluated, on the basis of the time change rate of the resistance, the reference value of evaluation of the defects of the wires being set, before the change of the resistance is increased by broken wires due to the increase in the amount of heat generated in the metal wires.
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申请公布号 |
JP2001274212(A) |
申请公布日期 |
2001.10.05 |
申请号 |
JP20000086696 |
申请日期 |
2000.03.27 |
申请人 |
HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD |
发明人 |
TSUKAMOTO KENICHI;HIRANO NOBUAKI;OBARA TETSUJI;AZUMA SEIICHIRO;TATE HIROSHI;HIGUCHI HIROHISA |
分类号 |
G01R31/26;G01R31/02;H01L21/3205;H01L21/66;H01L23/52;(IPC1-7):H01L21/66;H01L21/320 |
主分类号 |
G01R31/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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