发明名称 METHOD AND APPARATUS TO CONTROL PROCESSOR POWER AND PERFORMANCE FOR SINGLE PHASE LOCK LOOP (PLL) PROCESSOR SYSTEMS
摘要 An integrated circuit contains a central processing unit ("CPU"), a graphic control hub ("GCH"), a memory control hub ("MCH"), and a phase lock loop ("PLL"). The GCH, MCH, and PLL are coupled to the CPU. The MCH controls memory transactions. The PLL is configured to allow the CPU to operate at more than one power consumption states.
申请公布号 WO0173534(A2) 申请公布日期 2001.10.04
申请号 WO2001US07216 申请日期 2001.03.06
申请人 INTEL CORPORATION 发明人 CHO, SUNG-SOO;JAIN, SATCHITANAND
分类号 G06F1/32;(IPC1-7):G06F1/32 主分类号 G06F1/32
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