| 摘要 |
A semiconductor storage device (100) is disclosed that includes sense amplifier rows (SA0 to SA16) that receive a common sense amplifier drive voltage VINTA supplied by a internal voltage driver (5) having a high current source mode. According to one embodiment, the semiconductor storage device (100) may include banks of memory cells (B0 to B15), row decoders (DC0 to DC15), bank enable generation circuits (EC0 to EC15), sense amplifier rows (SA0 to SA16), sense amplifier drivers (DRA0 to DRA16), sense amplifier control circuits (SCA0 to SCA16), and internal voltage drivers (5 and 6). Internal voltage driver (5) can include a high current source or high voltage source mode, which can be received by a sense amplifier row (SA0 to SA16) during predetermined initial sense period. Other sense amplifier rows (SA0 to SA16) having already sensed data can be isolated from internal voltage driver (5) during the high current source or high voltage source mode.
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