Method of manufacturing an electrically programmable, non-volatile memory with logic circuitry

摘要

Method of manufacturing an integrated circuit comprising a memory operating at high voltage and logic circuitry operating at a lower voltage than the memory: formation of a first layer of gate oxide (3) with a first thickness on first and second portions of a semiconductor substrate (1) which are intended, respectively, for first transistors operating at high voltage and for second transistors operating at the lower voltage, and formation of a second layer of gate oxide (5) with a second thickness on third portions for cells of the memory; deposition of a first polysilicon layer to define gate electrodes (8,9) for first transistors and floating gate electrodes (7) for the memory cells; deposition of an interpolysilicon dielectric layer (18) so as to leave the interpolysilicon dielectric layer on the gate electrodes (8,9) of first transistors and on the floating gate electrodes (7); formation, on the second portions (1), of a third gate oxide layer (24) with a third thickness less than the first thickness of the first gate oxide layer (3); deposition of a second polysilicon layer (25) to define gate structures (29) of the memory cells, and gate electrodes (26,27) of second transistors and polysilicon covers (80,90) for the gate electrodes (8,9) of first transistors.