发明名称 Single step debug card using the PCI interface
摘要 This specification discloses a single step debug card using the PCI bus, which keeps the FRAME# of the PCI bus at a low voltage; latches and displays through an LED the address and command of the PCI bus cycle; keeps the control signal of read only memory and the IRDY# ready signal and TRDY# ready signal on the PCI bus at a low voltage, latches and displays through an LED the data and byte enable of the PCI bus cycle; outputs a device selection signal from a target device when the target device is detected; intercepts the PCI bus cycle when the device selection signal is kept at a low voltage and both the IRDY# ready signal and the TRDY# ready signal are kept at a low voltage; enables the PCI host to provide a retry function when the target device cannot respond a TRDY# ready signal before the PCI bus cycle ends so as to achieve the function of single step interruption debugging.
申请公布号 US2001027543(A1) 申请公布日期 2001.10.04
申请号 US20010805574 申请日期 2001.03.14
申请人 TSAI CHUN-NAN;CHU HOU-LI;FENG CHIH-HAO 发明人 TSAI CHUN-NAN;CHU HOU-LI;FENG CHIH-HAO
分类号 G06F11/267;(IPC1-7):G06F11/26 主分类号 G06F11/267
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