发明名称 |
Trench dmos transistor having a double gate structure |
摘要 |
A trench DMOS transistor cell is provided, which is formed on a substrate of a first conductivity type. A body region, which has a second conductivity type, is located on the substrate. At least one trench extends through the body region and the substrate. An insulating layer lines the trench. The insulating layer includes first and second portions that contact one another at an interface. The first portion of the insulating layer has a layer thickness greater than the second portion. The interface is located at a depth above a lower boundary of the body region. A conductive electrode is formed in the trench so that it overlies the insulating layer. A source region of the first conductivity type is formed in the body region adjacent to the trench. |
申请公布号 |
AU5172001(A) |
申请公布日期 |
2001.10.03 |
申请号 |
AU20010051720 |
申请日期 |
2001.03.16 |
申请人 |
GENERAL SEMICONDUCTOR, INC. |
发明人 |
FWU-IUAN HSHIEH;KOON CHONG SO;YAN MAN TSUI |
分类号 |
H01L29/423;H01L29/49;H01L29/78 |
主分类号 |
H01L29/423 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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