发明名称 Method of forming a high voltage MOS transistor on a semiconductor wafer
摘要 The present invention provides a method of forming a doped region with a DDD on a semiconductor wafer. The semiconductor wafer comprises a silicon substrate, a pad oxide layer, and a silicon nitride layer that is used to define an active area. A lithographic process is performed to define a position of the DDD. Then a first ion implantation process is performed to implant a specific dosage of dopants into the silicon substrate. The photoresist layer is then removed completely. A thermal oxidation process is performed to form a field oxide layer in the region not covered by the silicon nitride layer, and to simultaneously drive the dopants into the silicon substrate so as to form a doped region. The silicon nitride layer and the pad oxide layer are removed. Then a poly gate and a spacer are formed. A second ion implantation process is performed to implant ions into the silicon substrate so as to form the doped region with a DDD structure in the N-type MOS transistor.
申请公布号 US6297108(B1) 申请公布日期 2001.10.02
申请号 US20000523594 申请日期 2000.03.10
申请人 UNITED MICROELECTRONICS CORP. 发明人 CHU TUNG-YUAN
分类号 H01L21/8234;(IPC1-7):H01L21/336 主分类号 H01L21/8234
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