发明名称 |
Semiconductor device with salicide structure and fabrication method thereof |
摘要 |
A semiconductor device is provided, which makes it possible to decrease the electric sheet resistance of source/drain regions of MOSFETs in a peripheral circuitry without degradation of the data writing speed in nonvolatile memory cells. This device is comprised of nonvolatile memory cells and a peripheral circuitry provided on a same semiconductor substrate. The nonvolatile memory cells are formed by a first plurality of MOSFETs of a first conductivity type. The peripheral circuitry includes a second plurality of MOSFETs of the first conductivity type. Each of the first plurality of MOSFETs is equipped with a gate electrode having a floating age for data storing and source/drain regions having substantially no silicide films. Each of the second plurality of MOSFETs is equipped with source/drain regions having silicide films and a doping concentration lower than that of the source/drain regions of each of the first plurality of MOSFETs. It is preferred that the doping concentration of the source/drain regions of the first plurality of MOSFETs is equal to 1x1019 atoms/cm3 or higher and the doping concentration of the source/drain regions of the second plurality of MOSFETs is lower than 1x1019 atoms/cm3.
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申请公布号 |
US6297094(B1) |
申请公布日期 |
2001.10.02 |
申请号 |
US19990456384 |
申请日期 |
1999.12.08 |
申请人 |
NEC CORPORATION |
发明人 |
MATSUBARA YOSHIHISA;KAWATA MASATO |
分类号 |
H01L21/28;H01L21/8247;H01L27/10;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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