发明名称 High-speed fully-compensated low-voltage differential driver/translator circuit arrangement
摘要 An output buffer provides a stable, predetermined low voltage differential over power supply, temperature, and process variations yet has a high speed of operation. More particularly, a data path of an output buffer includes an emitter-coupled differential amplifier followed by an output section of two level-shifting emitter followers. A predetermined operating current biases the differential amplifier for unsaturated operation and a reference current biases the output section for unsaturated operation. The data path remains unencumbered by compensation circuitry to preserve high speed operation. Instead, a voltage compensator biases the differential amplifier to compensate, at least in part, for variations in a supply voltage. In addition, a variable biasing current to the voltage compensator with a predetermined temperature coefficient may further temperature compensate the differential amplifier. In addition to such "upstream" compensation, the output buffer may further include "downstream" temperature compensation by the addition of a VBE multiplier circuit to the reference current biasing of the output section. Additional temperature and level-shifting compensation may also be achieved through cascading a plurality of buffer stages.
申请公布号 US6297685(B1) 申请公布日期 2001.10.02
申请号 US20000593997 申请日期 2000.06.14
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 EWEN JOHN FARLEY;WILKINSON-GRUBER STEPHEN CHARLES
分类号 H03K19/003;(IPC1-7):H03K3/42 主分类号 H03K19/003
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