发明名称 Apparatus and method for inhibiting pattern distortions to correct pattern data in a semiconductor device
摘要 A correction target edge extracting part of a layout pattern data correction apparatus extracts a correction target edge from circuit layout patterns. A density calculation region setting part of the apparatus sets density calculation regions around the center of the correction target edge. An area density calculating part calculates an area density of design patterns within the density calculation regions. Given the area density thus calculated, a correction pattern size calculating part calculates the size of a correction pattern to be superposed on the correction target edge. In accordance with the calculated size, a correction pattern generating part generates the correction pattern. A graphic calculating part adds up the correction pattern and design layout patterns to generate corrected layout patterns.
申请公布号 US6298473(B1) 申请公布日期 2001.10.02
申请号 US19980204281 申请日期 1998.12.03
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 ONO YUSAKU;MORIIZUMI KOICHI
分类号 G03F1/08;G03F1/14;G03F1/36;G03F1/68;G03F1/70;G03F7/20;G06F17/50;H01L21/82;(IPC1-7):G06F7/60;G06F17/10;G03F9/00;G03C5/00 主分类号 G03F1/08
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