发明名称 VERTICAL MOS TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a vertical MOS transistor, whose high-frequency characteristics are more improved than conventional by reducing a feedback capacity, and to provide a method for manufacturing the transistor. SOLUTION: When a gate voltage is applied to a gate electrode 16a, a channel is formed in a p-epitaxial growth layer 12 along a trench 14, and electric currents are allowed to flow from an n+ drain layer 17 to the p-epitaxial growth layer 12. In this case, the overlapped distance of a gate 16 and the drain layer 17 via a gate oxide film 15 can be made longer than conventionally, and a capacity between the gate 16 and the drain layer 17 can be smaller than conventionally. Thus, a feedback capacity can be reduced, and high-frequency characteristics can be improved. Moreover, the part of the gate oxide film 15 on the bottom face of the trench 14 is made thicker than the part of the gate oxide film 15 on the sidewalls of the trench 14 so that a distance between the gate 16 and an n+ semiconductor substrate 11 can be made longer than conventionally, and a capacity formed between the gate 16 and the n+ semiconductor substrate 11 can be made smaller than conventionally. Therefore, the high frequency characteristics can be more improved than a conventional manner.
申请公布号 JP2001267572(A) 申请公布日期 2001.09.28
申请号 JP20000080756 申请日期 2000.03.22
申请人 SEIKO INSTRUMENTS INC 发明人 HARADA HIROBUMI;OSANAI JUN
分类号 H01L29/423;H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L29/423
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