发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide the manufacturing method of a semiconductor device that has reliable high-density multilayer interconnection with low resistance. SOLUTION: A metal film is deposited on a substrate 1, and is etched by a resist pattern to form lower layer wiring 4. The resist pattern for machining a conductive plug is formed in the lower layer wiring 4, and is used as a mask for etching the lower layer wiring 4 to form a conductive plug 6. The lower wiring 4 and the conductive plug 6 are buried by an organic SOG film 7, after that, the surface of the conductive plug 6 is exposed, and second wiring 8 is formed on the organic SOG film 7.
申请公布号 JP2001267417(A) 申请公布日期 2001.09.28
申请号 JP20000081865 申请日期 2000.03.23
申请人 SANYO ELECTRIC CO LTD 发明人 SHIMADA SATOSHI
分类号 H01L21/768;(IPC1-7):H01L21/768 主分类号 H01L21/768
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