MEMORY ARRAY WRITE-IN PORT

摘要

PROBLEM TO BE SOLVED: To provide a memory array write-in port which can write data in an array of a memory cell two times in each clock cycle. SOLUTION: Data is written in a memory array during first write-in operation by using a row enable signal (row decoder 305) and a write-in data signal (write- in driver 315) generated at a first phase (a first clock phase) of a clock signal. Next, data is written in a memory array during second write-in operation by using a row enable signal and a write-in data signal (write-in driver 315) generated at a second phase (a second clock phase) of a clock signal.