| 摘要 |
PROBLEM TO BE SOLVED: To provide a fine semiconductor device corresponding to reduction of gate length, and to provide its manufacturing method. SOLUTION: A sidewall insulating film 6 is formed on a side surface of an embedded gate electrode 3 on an Si substrate 1. A trench-type insulating film 10 for element isolation, which is formed through self alignment to the embedded gate electrode 3, is arranged up to a position higher than the embedded gate electrode 3. A source/drain contact 13, which makes contact with a high concentration source/drain diffusion region 12, is formed between the sidewall insulating film 6 and the insulating film 10. Since the source/drain contact 13 and the insulating film 10 are formed in a self-alignment manner to the embedded gate electrode 3, margin for mask alignment becomes unnecessary, and the whole active region or the dimension in the gate length direction of the source/drain contact 13 and the high concentration source/drain region 12 can be reduced.
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