摘要 |
PROBLEM TO BE SOLVED: To obtain the best solution for repeater insertion along actual wiring accurately in a short time even for an integrated circuit having a complicated constitution. SOLUTION: The device is equipped with an r-c graph generation part 8 which generates an r-c graph showing the relationship between wiring resistance and wiring capacity for each node on wiring according to information on physical quantities of a net list 2 showing the paths of wiring in the integrated circuit, wiring capacity and wiring resistance data 4, an arrangement wiring database 5, etc., and a repeater insertion analysis part 9 which finds as the insertion position of a repeater the point where the area of a rectangle having a point on the r-c graph as one corner becomes maximum, and can compute the accurate number and positions of repeater insertion at high speed with a small processing load without using a conventional delay analyzing tool and a complicated simulator which implement a traial-and-error method by virtually inserting repeaters and delay gates.
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