发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To realize short TAT and easy connection check, regarding an IP mounted ASIC. SOLUTION: A plurality of megacells IP1,..., IPm are mounted on a chip 11. Test circuits 12-1,..., 12-m are arranged inside the megacells IP1,..., IPm, respectively. The megacells IP1,..., IPm having the test circuits 12-1,..., 12-m are reused as an IP cell (design property), for example. A test control circuit 13 is arranged inside the chip 11. The megacells IP1,..., IPm are subjected to test or connection check based on test signals IP1-TEST, IPm-TEST.
申请公布号 JP2001267510(A) 申请公布日期 2001.09.28
申请号 JP20000080087 申请日期 2000.03.22
申请人 TOSHIBA CORP 发明人 TANAKA YOSHIHIRO
分类号 G01R31/26;G01R31/28;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):H01L27/04 主分类号 G01R31/26
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