| 摘要 |
The device for comparing two input signals (MI,PI) comprises a first comparator circuit (COMP1) with differential output, a second comparator (COMP2) which delivers the output logic signal (OUT), where each comparator comprises an input differential stage, and each stage has two branches biased by constant current generators (1,2). The device also comprises a current-contributing circuit (3) associated with a branch of input differential stage of the first comparator (COMP1) for copying the current IB1 in that branch and adding after multiplying by a factor K to the biasing current of input differential stage of the second comparator (COMP2), in order to facilitate the corresponding switching. In a variant of the device, it comprises an additional current-contributing circuit associated with the second branch of input differential stage, and each current-contributing circuit comprises a switch controlled by the output signal or the inverted output signal (OUT,OUTn), in order to stop the current contribution when the corresponding switching is effected. Each current-contributing circuit is based on current-mirror structure. The MOS transistor M7 has the width-length ratio equal to KxW/L, that is K times that of transistor M6. The constant current generators (1,2) deliver biasing currents not greater than a few hundreds of nanoamperes. An integrated circuit comprises the comparator device of proposed type.
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