RAKE SYNTHESIS RECEIVER AND RAKE SYNTHESIS METHOD

摘要

PROBLEM TO BE SOLVED: To provide a RAKE synthesis receiver and a RAKE synthesis method by which a small-scale hardware configuration permit to conduct RAKE synthesis even when number of synthesized propagation path signals is increased. SOLUTION: A synchronous code generating circuit 11 generates a spread code sequence on the basis of frame timing and outputs the spread code sequence in a timing difference of each of propagation path signals S1-S4 on the basis of the frame timing. Decoding circuits 12-1-12-4 demodulate the propagation path signals S1-S4 by using a corresponding spread code sequence. A timing synchronous circuit 13 receives the demodulated propagation path signals S1-S4, adjusts the delay difference by delay chip numbers L1-L4 on the basis of the frame timing from the synchronous code generating circuit 11 and outputs the adjusted delay difference synchronously with a symbol rate. A phase correction circuit 14 corrects in time division the phase of the propagation pat signals S1-S4 whose timing is adjusted synchronously with the symbol rate and a synthesis circuit 15 synthesizes the propagation path signals S1-S4 after the phase correction.